Kaligithi S.

Sarupya K. is a dedicated Electronics and Communication Engineering graduate from the Vijaya Institute of Technology for Women, affiliated with JNTUK, demonstrating a firm grasp of Embedded Systems and VLSI Design. Engaged in academic projects such as designing a synchronous binary counter, Sarupya has applied Verilog HDL and utilized the Xilinx Vivado tool to achieve optimized hardware utilization and timing performance. Her internship at BIST Technologies expanded her proficiency in Design for Testability, Scan Chain Implementation, and Automatic Test Pattern Generation. Sarupya is committed to advancing her technical expertise, particularly in digital electronics and semiconductor testing, while she actively participated in the National Level Shooting Ball and Throwball Championship. Fluent in English, Telugu, and Hindi, she is adaptable and collaborative, showing promising capability in engineering innovation.